Job Description
RoleOverview
- Co-define and industrialize a non-GPU-path AI compute architecture based onstructure-driven dataflow
- Translate architectural concepts into manufacturable silicon across realisticprocess nodes (28nm-5nm)
- Own end-to-end system realization: chip → package → board → cluster-scaleinfrastructure
- Lead development of scalable compute platform for large-model workloads
- Build and lead multidisciplinary engineering organization
Core Responsibilities
1) Architecture & System Definition
- Co-develop compute paradigm with founder
- Define system-level architecture across chip, interconnect, and clusterscaling
- Design dataflow embedded in structure rather than instruction scheduling
- Ensure feasibility across power, memory, and interconnect constraints
2) Silicon Development & Engineering Execution
- Lead full chip lifecycle (architecture → RTL → tape-out)
- Ensure manufacturability across nodes (28nm-5nm)
- Drive chip-package-syst...
- Co-define and industrialize a non-GPU-path AI compute architecture based onstructure-driven dataflow
- Translate architectural concepts into manufacturable silicon across realisticprocess nodes (28nm-5nm)
- Own end-to-end system realization: chip → package → board → cluster-scaleinfrastructure
- Lead development of scalable compute platform for large-model workloads
- Build and lead multidisciplinary engineering organization
Core Responsibilities
1) Architecture & System Definition
- Co-develop compute paradigm with founder
- Define system-level architecture across chip, interconnect, and clusterscaling
- Design dataflow embedded in structure rather than instruction scheduling
- Ensure feasibility across power, memory, and interconnect constraints
2) Silicon Development & Engineering Execution
- Lead full chip lifecycle (architecture → RTL → tape-out)
- Ensure manufacturability across nodes (28nm-5nm)
- Drive chip-package-syst...
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