Design Verification Engineer (SoC/ASIC/RTL)

Responsibilities: Work closely with design engineers and architects to create and document detailed test plans for verifying the SoC design. Establish and manage the infrastructure and environment for automated verification of the SoC's architecture, functionality, and performance. Develop reusable testbenches, test cases using constrained-random and directed methods, and verification modules for both block and system levels. Create a regression strategy, methodology, and scripting tools, ensuring comprehensive function coverage and addressing verification gaps before design releases and tape-out. Collaborate with design engineers to troubleshoot and resolve simulation issues. Provide support to test engineers during post-silicon validation. Mentor and guide team members and junior engineers, aiming to enhance verification efficiency. Requirements: Master in Electrical Engineering or equivalent with 8 years of relevant working experience/ PhD in Electrical Engineering or equivalent wit...