Senior Member of Technical Staff, AI‑Optimized DRAM Architect
📍 Micron Technology, Inc. • Richardson, TX, United States
Principal Memory Design Engineer, HBM
📍 Micron Technology, Inc. • Richardson, TX, United States
SoC Timing (Static Timing Analysis/STA) Engineer, HBM
📍 Micron Technology, Inc. • Richardson, TX, United States
Wet Mechanical Operations Engineer
📍 Micron Technology, Inc. • Syracuse, NY, United States
Global Process Safety Engineer
📍 Micron Technology, Inc. • Boise, ID, United States
HBM Product Manager (New College Grad)
📍 Micron Technology, Inc. • Boise, ID, United States
Memory Circuit Design Engineer - Staff, HBM
📍 Micron Technology, Inc. • Richardson, TX, United States
Director, HBM RTL Design and Integration
📍 Micron Technology, Inc. • Folsom, CA, United States
Member of Technical Staff (MTS) – HBM Design for Test (DFT)
📍 Micron Technology, Inc. • Richardson, TX, United States
Prof, WK Kellogg Chair , FAC -Tenure Sys
📍 Michigan State University • East Lansing, MI, United States