Full-time Posted June 09, 2026
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Job Description

Hi All,


I have an immediate requirements for Analog layout - Hyd location


Exp - 4 to 7 yrs

NP - Immediate

Mode of interview - F2F only in Hyd


JD:


Key Responsibilities:

  • End-to-end design and development of critical analog, mixed-signal, and custom digital blocks , along with full-chip integration support .
  • Responsible for timely delivery of high‑quality block-level layouts.
  • Perform verification flows including LVS, DRC, DFM, Antenna checks, and EMIR.
  • Work independently with cross-functional teams.

Mandatory Skills & Tools:

  • Strong hands-on experience in TSMC lower nodes (3nm / 5nm / 7nm / 12/16nm) .
  • Experience with Intel, Samsung, or GF nodes is acceptable, but TSMC is mandatory

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