Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Core Responsibilities1. Strategy and ArchitectureVerification Planning: Define the overall verification strategy, including the choice of methodology (typically UVM/SystemVerilog), tools, and infrastructure.Testbench Architecture: Design scalable, reusable, and robust verification environments. This includes developing Bus Functional Models (BFMs), monitors, scoreboards, and checkers.Feature Extraction: Analyze architectural specifications to identify critical features and corner cases that require rigorous testing.2. Execution and Technical LeadershipDevelopment: Write complex test cases and sequences to achieve high functional coverage.Debug: Lead the root-cause analysis of complex design bugs, collaborating closely with design engineers to implement fixes.Constraint Random Testing: Implement constrained-random stimulus generation to explore the design space beyond direct...
Core Responsibilities1. Strategy and ArchitectureVerification Planning: Define the overall verification strategy, including the choice of methodology (typically UVM/SystemVerilog), tools, and infrastructure.Testbench Architecture: Design scalable, reusable, and robust verification environments. This includes developing Bus Functional Models (BFMs), monitors, scoreboards, and checkers.Feature Extraction: Analyze architectural specifications to identify critical features and corner cases that require rigorous testing.2. Execution and Technical LeadershipDevelopment: Write complex test cases and sequences to achieve high functional coverage.Debug: Lead the root-cause analysis of complex design bugs, collaborating closely with design engineers to implement fixes.Constraint Random Testing: Implement constrained-random stimulus generation to explore the design space beyond direct...
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