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Lead Design Engineer

📍 Cadence Design Systems, Inc. • Pune, Maharashtra, India • Posted May 31, 2026

Full time Posted May 31, 2026
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Job Description

Description

(what the role does)
  • Technical interface for customer
  • Support customer Pre-post silicon SOC teams from initial PCIe Controller integration and bring-up.
  • Work closely with PCIe R&D team and Field Application Engineers
  • Update PCIe team with the latest customer feedback and competitive analysis.
  • Work closely with Physical design team and RTL team to understand chip architecture, hierarchy.
  • Perform RTL simulation to verify functionality.

    • We’re doing work that matters. Help us solve what others can’t.

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