Physical Design Engineer: Timing & STA

IC Resources is looking for a Physical Design Engineer in Zürich, Switzerland. This technical role requires strong expertise in timing closure, synthesis, and the full RTL-to-GDSII implementation flow. You will collaborate with various engineering teams to ensure high-quality backend implementation and successful tapeout.

The ideal candidate has extensive experience in Physical Design/Backend ASIC implementation, along with proficiency in EDA tools like Synopsys or Cadence. This is a unique opportunity to join a growing semiconductor team and contribute to advanced silicon products.