Job Description
Advance your expertise with Celero as a Senior ASIC Design Engineer, focusing on innovative optical modem technologies. Your role will involve digital design and verification for cutting-edge projects.
Celero is looking for a Senior ASIC Design Engineer with over four years of experience in digital design, particularly in Verilog and System Verilog. This position requires you to engage in essential design tasks, including synthesis, timing analysis, and performance optimization vital for success in optical transceiver projects.
Key Responsibilities:
• Develop digital circuit designs using HDL
• Execute timing analysis and formal verification tasks
• Optimize designs for enhanced performance and efficiency
• Conduct RTL verification to ensure functionality
• Attend design reviews to share valuable insights
Requirements:
• Degree in Electrical or Computer Engineering
• Over 4 years in digital design and verification
• Proficient in Verilog/System Verilog<...
Celero is looking for a Senior ASIC Design Engineer with over four years of experience in digital design, particularly in Verilog and System Verilog. This position requires you to engage in essential design tasks, including synthesis, timing analysis, and performance optimization vital for success in optical transceiver projects.
Key Responsibilities:
• Develop digital circuit designs using HDL
• Execute timing analysis and formal verification tasks
• Optimize designs for enhanced performance and efficiency
• Conduct RTL verification to ensure functionality
• Attend design reviews to share valuable insights
Requirements:
• Degree in Electrical or Computer Engineering
• Over 4 years in digital design and verification
• Proficient in Verilog/System Verilog<...
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