Job Description
Senior Memory Layout Engineer
Location- Bengaluru
About the Role
We are seeking a highly skilled Senior Memory Layout Engineer with 5+ years of hands-on experience in custom memory design and layout. In this role, you will be responsible for developing high-density, low-power memory layouts at advanced technology nodes, ensuring manufacturability, reliability, and performance for next-generation SoCs.
Responsibilities
Own end-to-end layout design of SRAM, Register Files, CAMs, and other custom memory blocks.
Perform floorplanning, device placement, routing, and optimization for area, power, and performance.
Ensure DRC/LVS/DFM compliance across multiple technology nodes (7nm, 5nm, and below).
Collaborate with circuit design teams to translate schematics into robust physical layouts.
Conduct parasitic extraction (PEX) and work closely with STA/verification teams for timing closure.
Drive layout automation using scripting (SKILL, Tcl, Python) to improve...
Location- Bengaluru
About the Role
We are seeking a highly skilled Senior Memory Layout Engineer with 5+ years of hands-on experience in custom memory design and layout. In this role, you will be responsible for developing high-density, low-power memory layouts at advanced technology nodes, ensuring manufacturability, reliability, and performance for next-generation SoCs.
Responsibilities
Own end-to-end layout design of SRAM, Register Files, CAMs, and other custom memory blocks.
Perform floorplanning, device placement, routing, and optimization for area, power, and performance.
Ensure DRC/LVS/DFM compliance across multiple technology nodes (7nm, 5nm, and below).
Collaborate with circuit design teams to translate schematics into robust physical layouts.
Conduct parasitic extraction (PEX) and work closely with STA/verification teams for timing closure.
Drive layout automation using scripting (SKILL, Tcl, Python) to improve...
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