Senior RTL Architect & DV Lead, Digital Design

A global semiconductor leader in Metro Manila is seeking an experienced Digital Design Engineer to drive digital RTL design and verification. Candidates should have a BS/MS in a relevant field and 5–10 years of experience in digital design. Strong SystemVerilog/Verilog skills are necessary. The role involves collaboration with cross-functional teams and responsibilities for defining architectures, developing RTL, and ensuring effective verification processes. This position offers the chance to work in a fast-paced, innovative environment.
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