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Sr Principal ASIC / RTL Design Engineer

📍 Onsemi • Bengaluru, Karnataka, India • Posted June 02, 2026

Full-time Posted June 02, 2026
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Job Description

Job Summary

We are seeking a skilled and motivated Senior Digital IC Design Engineer with over 5 years of experience in digital design and proven expertise in memory IP integration (SRAM, ROM, EEPROM, OTP/NVM). The candidate will play a key role in the development, integration, and verification of memory subsystems in advanced SoC platforms.


Key Responsibilities

  • Own and drive the integration of memory IPs into larger digital subsystems and SoC platforms.
  • Collaborate with memory IP teams to understand interface requirements, timing constraints, and test features.
  • Perform RTL design, lint, CDC, and synthesis for digital logic blocks interacting with embedded memories.
  • Define and execute design verification plans in coordination with the verification team.
  • Interface with physical design and validation teams to ensure successful implementation and bring-up.
  • Support post-silicon debug for memory interface-related issues...

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