Job Description
Static Timing Analysis (STA) Engineer Job Description
JD:3
Experience : 3+ years of relevant experience
Expectations:
Candidate should have strong STA fundamentals.
Has done timing sign-off including timing margin calculations independently on SoC level.
Experience in handling STA of multi-power domain designs.
STA flow enhancement, abstraction with bottleneck identification.
Proficient in design margins and SDC constructs.
TAT reduction in multi-mode, multi power domain/designs.
Generate timing ECOs for Physical design.
Drive ambitious schedules and enables dependent teams to accomplish.
Proficient with EDA tools from Synopsys/Cadence.
Excellent analytical & communication skills.
Show ability to collaborate in a multi-functional environment, cross-site or cross-time zone.
Proficient in Tcl and Perl or other scripting relevant language is a plus
JD:3
Experience : 3+ years of relevant experience
Expectations:
Candidate should have strong STA fundamentals.
Has done timing sign-off including timing margin calculations independently on SoC level.
Experience in handling STA of multi-power domain designs.
STA flow enhancement, abstraction with bottleneck identification.
Proficient in design margins and SDC constructs.
TAT reduction in multi-mode, multi power domain/designs.
Generate timing ECOs for Physical design.
Drive ambitious schedules and enables dependent teams to accomplish.
Proficient with EDA tools from Synopsys/Cadence.
Excellent analytical & communication skills.
Show ability to collaborate in a multi-functional environment, cross-site or cross-time zone.
Proficient in Tcl and Perl or other scripting relevant language is a plus
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